Novel ‘tunneling’ design for energy-efficient chips
Experts have been experimenting with tunneling field-effect transistor technology (TFET) for decades, but have been hindered by insurmountable tradeoffs in power and performance. Penn engineers have redesigned tunneling FETs with energy efficiency in mind.
Modern computers contain tens of billions of switches, called transistors, that pass electrical signals to process inputs and outputs—serving as the basis for computation.
Field-effect transistors (FETs) offer some of the most energy-efficient switching in commercial computing chips, but even when operating with minimal voltages, FETs still consume too much power to support the growing demands of advancing technologies and respond to the energy crisis’ appeals for lower-power hardware.
Now, Penn Engineering researchers have found a way to greatly reduce the energy consumption of FETs using a method of tunneling electrons through energy barriers rather than going over them. Electrons in TFETs are like balls that need to roll up a hill to get to the other side, but by tunneling, they don’t need to roll up the hill—they get a little push and manage to get through it instead.
Tunneling requires much lower voltages than the thermal injection used in state-of-the-art FETs, and through multiple device demonstrations and simulations the researchers confirmed electron tunneling is what allows their transistor to be so effective at low power.
The experiments point to a promising future for tunneling FETs beyond their energy efficiency. With further research, these devices have the potential to surpass other FET limitations..
“Our design can likely be miniaturized to degrees that a standard FET cannot and accomplish even faster switching. It’s a very promising solution not only for energy usage, but also other versatile device applications requiring complex computational tasks,” says Jinshui Miao, former postdoctoral researcher in the Jariwala Lab at the School of Engineering and Applied Science.
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